The invention relates to low voltage integrated circuit digital-to-analog converters, and especially to input level shifting circuits therefore.
Various digital-to-analog converter circuits are known. As the state-of-the-art has advanced, monolithic digital-to-analog converters (DACs) capable of increased accuracy, greater bandwidth (i.e., operating speed), and capable of operating from fairly low magnitude power supply voltages have been developed. Nevertheless, further improvements in each of these areas are highly desirable in order to broaden the markets for DACs, by making it economically practical to use DACs in a larger range of low cost products. It is highly desirable to provide in a monolithic integrated circuit, particularly a monolithic DAC, the capability of operating (within predetermined specifications) not only from very low magnitude power supply voltages, but also from very high magnitude power supply voltages. Providing such capability in an integrated circuit, particularly in a monolithic DAC, imposes various difficulties upon the circuit designer. For example, provision of the capability of operating from low magnitude power supply voltages often presents the problem of generating adequate internal operating voltages in response to "worst case" TTL input signals. Use of low magnitude power supply voltages also makes it difficult to generate the maximum output voltages that usually are required. The term "head room" is sometimes used by those skilled in the art to describe the problem of obtaining suitable output signal levels in an integrated circuit when either or both of the power supply voltages are low, for example, +4.75 volts or -4.75 volts. It is difficult to generate adequately high output voltages if the circuit has little "head room" when a low positive power supply voltage is used. The same is true for a negative output swing when the negative supply is a low voltage. For a large positive output swing, the emitter-to-base voltage of an NPN pullup transistor must be included in the "head room", and a prior circuit stage must be provided to drive the base of the NPN pullup transistor. For modern, high speed, low power circuitry, those skilled in the art will recognize that such prior stages of circuitry also require adequate "head room" to accommodate the various emitter-to-base voltage drops and collector-to-emitter voltage drops that are needed to produce the signal that drives the base of the NPN pullup transistor. A similar condition applies to the NPN pulldown transistor.
When the power supply voltages (+V.sub.CC and/or -V.sub.CC) are at a very high magnitude level, for example at +15 to +18 volts (or -15 to -18 volts), then, during certain operating conditions the collector-to-emitter breakdown voltages of the pullup and pulldown transistors are likely to be exceeded. This is likely to occur because typically, the normal collector-to-emitter breakdown voltage of the pullup and pulldown transistors, when they are "on", is roughly 20 volts for a typical high speed bipolar manufacturing process, and the collector-to-emitter voltages of the pullup and pulldown transistors exceeds this value if +V.sub.CC is +15 volts or higher and -V.sub.CC is -15 volts or more negative. To overcome this problem, additional active devices, such as transistors and zener diodes, have been provided in series with the pullup and pulldown transistors to "absorb" some of the collector-to-emiter overvoltages that would otherwise be applied to the pullup and pulldown transistors and cause them to break down. Both zener diode voltage drops and collector-to-emitter voltage drops have been provided in series relationship with the pullup and pulldown transistors to avoid the breakdowns that occur when high power supply voltages are applied to push-pull output circuits. The provision of such additional circuitry greatly complicates a circuit design, making the circuit more costly, often reducing its speed, increasing its power consumption, and reducing the "head room" needed to obtain adequate output signal levels. Another constraint faced by circuit designers of monolithic integrated circuits is the limited number of pins or leads of economical packages in which the chips must be housed. For monolithic DACs, it is often desirable to provide a capability of connecting external components, such as potentiometers, to effectuate precise adjustment of bit currents, as may be required in certain practical applications of monolithic DACs. It also may be desirable to attach external capacitors to effectuate filtering of noise signals, since provision of large internal filtering capacitors in a monolithic integrated circuit is impractical due to the large amount of chip area required for integrated circuit capacitors.
Thus, it can be seen that there is a continuing need for improved circuit design techniques and structures which make it possible to provide circuit operation at specified high speeds, over a wide range of power supply voltages, with minimum circuit complexity, while requiring minimum area monolithic chip area to accomplish these goals.
There is a special need for an improved amplifier output structure that provides the cpability of operation from both high magnitude and low magnitude power supply voltages and is capable of operating with minimum "head room" in order to produce the highest possible signal voltage levels when the positive and/or negative power supply voltage magnitudes are low.
Another major problem always faced by monolithic circuit designers in the complication produced by the requirement of providing circuit designs which not only meet the foregoing requirements, but also meet them over a wide range of temperatures.
Prior DACs have had relatively large negative power supply voltages from which to develop voltages across precision resistors that determine bit currents and from which to operate current switches that selectively sum the bit currents to produce an analog output current in response to the digital inputs. Some prior DACs have used zener diodes having breakdown voltages of approximately seven volts to shift TTL input levels down to the lower voltage levels required to control the bit current switches. This technique cannot be used if the negative power supply voltage is not substantially greater in magnitude than the zener diode breakdown voltage. Although resistive level shifting techniques have been used for various purposes, they have not been used where constant voltage level shifting is required in monolithic integrated circuits, probably because of loss of switching speeds and inadequate control of the voltage level shifts due to processing variations.